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developerWorks: A Developer's Guide to the PowerPC Architecture

Apr 02, 2004, 07:00 (0 Talkback[s])
(Other stories by Brett Olsson, Anthony J. Marsala)


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"The PowerPC architecture and the application-level programming model are common across all branches of the PowerPC architecture family tree. For detailed information, see the product user's manuals available in the IBM PowerPC Web site technical library...

"The PowerPC architecture is a Reduced Instruction Set Computer (RISC) architecture, with over two hundred defined instructions. PowerPC is RISC in that most instructions execute in a single cycle and typically perform a single operation (such as loading storage to a register, or storing a register to memory).

"The PowerPC architecture is broken up into three levels, or 'books.' By segmenting the architecture in this way, code compatibility can be maintained across implementations while leaving room for implementations to choose levels of complexity for price/performances trade-offs..."

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