"The seminar will present the challenges of system-on-a-chip
(SoC) design verification and demonstrate Linux operating
system-based electronic design verification solutions."
" 'Designers are facing unprecedented verification challenges
due to the increasingly complex functions being embedded in a
single device,' said Steve Smith, marketing director of Synopsys'
design verification technology group. 'Industry analysts have shown
that the cost of functional verification is rising rapidly and is
currently taking over 50% of the entire design cycle. With this
background, Synopsys teamed with SGI to accelerate the
availability and performance of verification tools on Linux
operating system-based parallel computer systems. This seminar
is being presented as part of our ongoing commitment to this team
" 'We are leveraging three exciting and important trends in the
electronic systems market today,' noted Shing Pan, Electronics
Industry marketing manager at SGI. 'First, the continuous delivery
of higher performance and productivity design verification tools;
second, Moore's Law in action increasing performance and
affordability of computer systems based on Intel architecture
processors, such as Pentium and Itanium; and third, the growing
adoption of Linux. Putting all three components together makes a
compelling solution to the challenges faced by SoC designers
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