“Synopsys, Inc. (Nasdaq:SNPS), recently released the 4.4 version
of its pioneering VERA System Verifier, a comprehensive testbench
automation solution. VERA’s new version highlights key performance
upgrades that help provide functionality features and flexibility
options for users verifying multimillion-gate systems.”
“Synopsys’ commitment to the broadening verification arena is
reflected in VERA’s version 4.4 support of all major VHDL
simulators such as NC-VHDL, Leapfrog VHDL, MTI ModelSim, in
addition to a tight integration with Synopsys’ new Scirocco VHDL
simulator. Synopsys also extends the performance and availability
of verification tools by offering VERA for the Red Hat 6.2 Linux
operating system running on X86 platforms. Synopsys is the
first major electronic design automation (EDA) company to feature a
full verification environment on Linux, including testbench
automation, high performance Verilog simulation and code coverage
simulation tools.”
“We have adopted VERA for our verification environment. VERA’s
powerful verification features, coupled with its natural C++ like
language, make it the right choice for our high complexity systems
and tight design schedules,” said Michael Yamamura, vice president
of ASIC engineering at Redback Networks. “Using VERA on the Linux
platform gave us an effective cost performance verification
solution.”