Helping Out SSDs

[ Thanks to An Anonymous Reader for
this link. ]

“In our last article, we did a deep-dive on the anatomy
of SSDs, starting with the basics of the NAND Flash cells that are
floating-gate transistors. The transistors are then combined to
form pages, which are formed into blocks, which are formed into
planes, which are formed into chips, which are formed into drives.
As discusssed, floating-gate transistors have a few limitations:

Very fast read performance
Asymmetric read/write performance (reads are 2-3 orders of
magnitude faster than writes) There are data retention limitations
due to leakage and due to exercising the cells (i.e. using the
erase/program cycles)
Shrinking the dies to increase density increases the probability of
data corruption from erase/program functions disturbing neighboring
NAND Flash cells have a limited number of erase/program cycles
before they can no longer retain data”


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