Home News Now you can DIY a RISC-V SoC with SiFive’s “hassle-free” process By Rick Lehrbaum May 9, 2017 SiFive announced free downloads and tools for rapid evaluation of its “fully synthesizable” RISC-V based Coreplex E31 and E51 cores on a $99 FPGA dev board. Complete Story Facebook Twitter Linkedin Email Print Previous articlessh_scan – Verifies Your SSH Server Configuration and Policy in Linux Next articleHow to Password Protect a Vim File in Linux Get the Free Newsletter! Subscribe to Developer Insider for top news, trends, & analysis Email Address By subscribing, you agree to our Terms of Use and Privacy Policy. Subscribe Must Read News PhotoPrism’s Latest Update Introduces Two-Factor Authentication News Niri 0.1.5 Wayland Compositor Brings More Than Just Aesthetics News Thunderbird Plans for Rust Integration with Microsoft Exchange Service Native Implementation News Andreas Tille Is the New Debian Project Leader News Audacity 3.5 Adds Cloud Projects & Advanced Tempo Detection