[ Thanks to David F.
Skoll for this link. ]
“Synopsys is porting virtually all its front-end tools to Linux,
including Behavioral Compiler, Design Compiler, Module Compiler,
FPGA Compiler, PrimeTime, TetraMax and the Scirocco VHDL simulator.
Synopsys’ VCS Verilog simulator was already there. About all that’s
missing from the current list is Physical Compiler and the Epic
physical verification tools.”
“We think Linux is ready for EDA and EDA is ready for Linux, and
we will go and make that market,” said Raul Camposano, chief
technology officer at the Mountain View company. Camposano said
Synopsys believe Linux could claim 10 to 20 percent of Synopsys’
revenues within the next two years. He expects that the rest will
be Unix, with Windows NT strong only in FPGA design.”
“Camposano made it clear that Synopsys views Linux, not
Windows NT, as the emerging No. 2 platform for chip design.
“With the exception of FPGAs we have seen very, very little market
adoption [of NT],” he said. … “Basically, Linux is knocking
NT out of the design world,” said Gary Smith, chief EDA analyst at
Dataquest Inc.”